منابع مشابه
Power distribution analysis of VLSI interconnects using model orderreduction
The analysis and simulation of effects induced by interconnects become increasingly important as the scale of process technologies steadily shrinks. While most analyses focus on the timing aspects of interconnects, power consumption is also important. In this paper, the power distribution analysis of interconnects is studied using a reduced-order model. The relation between power consumption an...
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This paper reviewed the comparison between different clock distribution schemes which used for low power VLSI design which are the most important aspect in the industry. The main clock distribution schemes are single driver clock scheme and distributed buffers clock scheme. There are different tradeoffs in both the techniques such as size of buffers, number of buffers etc.
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چکیده رساله/پایان نامه : تاکنون روشهای متعددی در ارتباط با مکان یابی خطا در شبکه انتقال ارائه شده است. استفاده مستقیم از این روشها در شبکه توزیع به دلایلی همچون وجود انشعابهای متعدد، غیر یکنواختی فیدرها (خطوط کابلی، خطوط هوایی، سطح مقطع متفاوت انشعاب ها و تنه اصلی فیدر)، نامتعادلی (عدم جابجا شدگی خطوط، بارهای تکفاز و سه فاز)، ثابت نبودن بار و اندازه گیری مقادیر ولتاژ و جریان فقط در ابتدای...
An efficient CAD tool for High-Level Synthesis of VLSI digital transformers
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Abstract Using spurious power suppression technique (SPST) in VLSI will reduce the power consumption of the system significantly. Here we are going to implement this design in Infinite Impulse Response (IIR) and Finite Impulse Response (FIR) filter architecture. When we are using this technique in this multipliers the no of partial products generated will be reduced to half which reduces the co...
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ژورنال
عنوان ژورنال: VLSI Design
سال: 1998
ISSN: 1065-514X,1563-5171
DOI: 10.1155/1998/76525